In the manufacture of integrated circuits (ICs) of semiconductor devices, a variety of (semi)conductive device regions and layers are formed on a device substrate, generally segregated by electrically insulating dielectric regions and layers. In the manufacture of the IC, one or more layers may be patterned to, for example, create openings in the dielectric layers. In the openings (semi)conducting material(s) can be provided to permit contact and electrical communication between different regions of the IC. To form such openings, a photo-resist is patterned using photolithography over the dielectric layer, creating regions in which the dielectric layers is bared and can be removed, for example by exposure to a suitable etching medium.
However, the photo-resist layer may degrade during the removal of the dielectric material, for example because the etching medium affects the photo-resist, thereby reducing the resolution of the image patterned into the dielectric layer. In order to reduce the amount of imperfections in the image transfer from the resist layer to the underlying dielectric layer, it is known to interpose a layer of an inorganic material, known as a hard-mask, between the dielectric layer and resist layers. A photo-resist is then coated over the hard-mask and patterned to expose regions of the hard-mask. The hard-mask regions bared after patterning the photo-resist are then removed by exposure to a suitable process, such as a plasma etch, to which the photo-resist layer is resistant. Thereby, the hard-mask is patterned corresponding to the pattern of the photo-resist and hence the pattern is transferred from the photo-resist into the hard-mask. The regions of dielectric layer that are exposed after the patterning of the hard-mask are then removed, for example by etching or another process that is selective for the dielectric and to which the hard-mask is resistant.
However, a problem is that the hard-mask material may interact with other compounds present in the environment or residues at the surface. This may lead to the presence of residues which adversely affect the resolution of the image patterned into the dielectric layer. For example, the resolution of the resulting image, patterned into the dielectric layer may be affected because of filling issues. Also, unwanted residues may be growing after the dielectric etching and affect filing of the trenches. From Mei Qi Weng et al., “Metal Hard-mask employed Cu/Low k Post Etch Resist Ash/Wet Clean, Process optimization and Integration into 65 nm Manufacturing Flow”, Proceedings of the Eighth International Symposium on Ultra-Clean Processing of Silicon Surfaces UCPSS 2006, a wafer cleaning process is disclosed. The process includes the removal of organometalic residue and metal fluorite compounds caused by the presence of a metal hard-mask in a copper/low-K process. After etching the interconnect trenches, the hard-mask is slightly etched to remove the organometalic residue and is subject to a fluoride based aqueous chemical to dissolve the metal fluoride particles and hence remove the metal fluoride.
However, a disadvantage of this method is that it does not prevent re-growth of the metal fluoride particles or other contamination when substances are present in the environment with which the hard-mask may react.